cystech electronics corp. spec. no. : c806q8 issued date : 2009.12.30 revised date : 2011.03.21 page no. : 1/9 MTNN18N03Q8 cystek product specification n-channel enhancement mode power mosfet MTNN18N03Q8 n-ch 1 n-ch 2 bv dss 30v 60v i d 10a 0.115a r dson(max) 18m 5 description the MTNN18N03Q8 provides the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost effectiveness. the sop-8 package is universally preferred for all co mmercial-industrial surface mount applications and suited for low voltage applications such as dc/dc converters. features ? simple drive requirement ? low on-resistance ? fast switching speed ? two n-ch mosfets in a package ? pb-free lead plating package equivalent circuit outline MTNN18N03Q8 sop-8 s source d drain g gate
cystech electronics corp. spec. no. : c806q8 issued date : 2009.12.30 revised date : 2011.03.21 page no. : 2/9 MTNN18N03Q8 cystek product specification absolute maximum ratings (ta=25 c) limits parameter symbol n-ch 1 n-ch 2 unit drain-source voltage v ds 30 60 v gate-source voltage v gs 20 20 v continuous drain current @ t c =25 c (note 1) i d 10 0.115 a continuous drain current @ t c =100 c (note 1) i d 7 0.08 a pulsed drain current (note 2&3) i dm 40 0.7 a pd 2 0.4 w total power dissipation @ t a =25 c linear derating factor 0.016 0.016 w / c esd susceptibility (note 4) 1250 v operating junction temperature tj -55~+150 c storage temperature tstg -55~+150 c thermal resistance, junction-to-ambient (note 1) rth,ja 62.5 c/w note : 1. su rface mounted on 1 in2 copper pad of fr-4 board; 135 c/w when mounted on minimum copper pad. 2. pulse width lim ited by maximum junction temperature. 3. pulse width 300 s, duty cycle 2%. 4. human body model, 1.5k in series with 100pf. characteristics (tj=25 c, unless otherwise specified) n-channel mosfet 1 symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0, id=250 a v gs(th) 1.0 - 3.0 v v ds = v gs , i d =250 a i gss - - 100 na v gs = 20 - - 1 v ds =30v, v gs =0 i dss - - 25 a v ds =24v, v gs =0, tj=125 c - 12 18 v gs =10v, i d =10a *r ds(on) - 17 20 m v gs =4.5v, i d =8a dynamic *qg(v gs =10v) - 19 - *qg(v gs =4.5v) - 9.4 - *qgs - 4.2 - *qgd - 3.8 - nc i d =10a, v ds =15v, v gs =4.5v *td (on) - 15 - *tr - 10 - *td (off) - 43 - *tf - 7 - ns v ds =25v, i d =1a,v gs =10v, r g =6 , r l =25 ciss - 731 - coss - 116 - crss - 36 - pf v gs =0v, v ds =15v, f=1mhz rg - 1 - v gs =0v, v ds =0v, f=1mhz
cystech electronics corp. spec. no. : c806q8 issued date : 2009.12.30 revised date : 2011.03.21 page no. : 3/9 MTNN18N03Q8 cystek product specification source-drain diode *i s - - 2.3 *i sm - - 9.2 a *v sd - 0.7 1.1 v i s =2.3a , v gs =0v *trr - 50 - ns *qrr - 2 - nc i f =i s , v gs =0, di/dt=100a/ s n-channel mosfet 2 symbol min. typ. max. unit test conditions bv dss* 60 - - v v gs =0, i d =10 a v gs(th) 1 - 2.5 v v ds =v gs , i d =250 a i gss - - 10 a v gs =20v, v ds =0 i dss - - 1 a v ds =60v, v gs =0 - 3.6 5.5 i d =100ma, v gs =5v r ds(on)* - 3 5 i d =100ma, v gs =10v g fs 100 - - ms v ds =10v, i d =100ma c iss - 30.5 - c oss - 9.3 - c rss - 5.9 - pf v ds =10v, v gs =0, f=1mhz *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping MTNN18N03Q8 sop-8 (pb-free lead plating package) 3000 pcs / tape & reel typical characteristics n-ch mosfet 1
cystech electronics corp. spec. no. : c806q8 issued date : 2009.12.30 revised date : 2011.03.21 page no. : 4/9 MTNN18N03Q8 cystek product specification
cystech electronics corp. spec. no. : c806q8 issued date : 2009.12.30 revised date : 2011.03.21 page no. : 5/9 MTNN18N03Q8 cystek product specification n-ch mosfet 2 typical output characteristics 0 0.05 0.1 0.15 0.2 0.25 0.3 01234 drain-source voltage -vds(v) drain current - id(a) vgs=2.2v 3.5v 4v 6v 3v typical transfer characteristics 0 0.05 0.1 0.15 0.2 0.25 0.3 01234 gate-source voltage-vgs(v) drain current -id(a) vds=10v static drain-source on-state resistance vs drain current 1 10 0.01 0.1 1 drain current-id(a) static drain-source on-state resistance-rds(on)() vgs=5v static drain-source on-state resistance vs drain current 1 10 0.01 0.1 1 drain current-id(a) static drain-source on-state resistance-rds(on)() vgs=10v
cystech electronics corp. spec. no. : c806q8 issued date : 2009.12.30 revised date : 2011.03.21 page no. : 6/9 MTNN18N03Q8 cystek product specification static drain-source on-state resistance vs gate-source voltage 0 1 2 3 4 5 6 7 0 5 10 15 20 25 gate-source voltage-vgs(v) static drain-source on-state resistance-rds(on)() id=100ma id=50ma reverse drain current vs source-drain voltage 0.001 0.01 0.1 1 10 0 0.2 0.4 0.6 0.8 1 reverse drain current -idr(a) source-drain voltage-vsd(v) capacitance vs drain-to-source voltage 1 10 100 0.1 1 10 100 drain-source voltage -vds(v) capacitance---(pf) c oss ciss crss
cystech electronics corp. spec. no. : c806q8 issued date : 2009.12.30 revised date : 2011.03.21 page no. : 7/9 MTNN18N03Q8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c806q8 issued date : 2009.12.30 revised date : 2011.03.21 page no. : 8/9 MTNN18N03Q8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c806q8 issued date : 2009.12.30 revised date : 2011.03.21 page no. : 9/9 MTNN18N03Q8 cystek product specification sop-8 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. 8-lead sop-8 plastic package cystek packa g e code: q8 marking: top view a b front view f c d e g part a i h j k o m l n right side view part a date code device name 18n03 dim min. max. min. max. a 0.1890 0.2007 4.80 5.10 i 0.0098 ref 0.25 ref b 0.1496 0.1654 3.80 4.20 j 0.0118 0.0354 0.30 0.90 c 0.2283 0.2441 5.80 6.20 k 0.0074 0.0098 0.19 0.25 d 0.0480 0.0519 1.22 1.32 l 0.0145 0.0204 0.37 0.52 e 0.0138 0.0193 0.35 0.49 m 0.0118 0.0197 0.30 0.50 f 0.1472 0.1527 3.74 3.88 n 0.0031 0.0051 0.08 0.13 g 0.0531 0.0689 1.35 1.75 o 0.0000 0.0059 0.00 0.15 h 0.1889 0.2007 4.80 5.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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